Development of Reversible Programmable Gate Array

Authors

  • C. Sivaranjith PG Scholar
  • M. Subramani Assistant professor, K.S.R C E

Keywords:

Reversible gate, Garbage output, Quantum cost, Multiplexer

Abstract

The model of digital computation used until now is intrinsically irreversible. This is because the two-bit gates used to construct circuits are irreversible as they involve two input bits and only one output bit. Irreversible gates dissipates energy during their operations, in this manner information bits are lost. Reversible Logic is a technique that can lead to circuits run as normal Logic operations, but use less power. In reversible logic the number of inputs and number of outputs must be equal. The input states are reconstructed from output states because of one to one mapping.Using reversible logic gates in the digital circuits it reduces the power consumption and non-destruction of information. In this paper, configurable logic block is designed in reversible manner for Programmable logic array based and multiplexer based field programmable gate array with less number of reversible gates, garbage outputs and quantum cost.

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Published

2023-05-20

How to Cite

Sivaranjith, C., & Subramani, M. (2023). Development of Reversible Programmable Gate Array. International Journal of Communication and Computer Technologies, 1(2), 72–78. Retrieved from https://ijccts.org/index.php/pub/article/view/13

Issue

Section

Research Article