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Survey of various Techniques to Reduce Leakage Power in FPGA

 

Survey of various Techniques to Reduce Leakage Power in FPGA

S.Poovarasan,R.Brindha


Abstract:

FPGA is known as Field Programmable Gate Array that can be programmed in the field after manufacture. It can be reprogrammed to desired application or functionality requirements after manufacturing. The major difference between FPGA and Application Specific Integrated Circuits (ASICs), which are custom manufactured for specific design tasks. Due to their programmable nature, FPGAs are an ideal fit for many different markets. As the industry leader, Xilinx provides comprehensive solutions consisting of FPGA devices, advanced software, and configurable, ready-to-use IP cores for markets and applications. However, the power consumption of FPGAs remains prohibitive for some applications. Power dissipation and Leakage power is the major issue of FPGAs. Thus, low-leakage FPGAs are essential if they are to be used for hand-held applications. Some more techniques are discussed here to reduce power dissipation. Power gating and Clock gating techniques are more efficient for leakage power reduction

Keywords: Field Programmable Gate Arrays, Leakage power, Power gating, Clock gating.

Volume: 5 | Issue: Special Issue

Pages: 43 - 50

Paper ID : IJCCTSSP5

Issue Date: Jan - Dec , 2017

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