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Time Interleaved High Speed Successive Approximation Analog to Digital Converter

 

Time Interleaved High Speed Successive Approximation Analog to Digital Converter

P.Sasikala,V.Gowrishankar , Dr.Venkatachalam K3


Abstract:

This paper describes time interleaved high speed analog to digital converter. The signals in the world are inherently analog, but processing of analog signals is very difficult. Hence, it is required to convert analog to digital signals by the use of analog to digital converter. In the existing method, successive approximation analog to digital converter is analyzed which works on binary search method. The successive approximation analog to digital converter consumes very low power and it is a model of choice for low power devices. Even though it consumes less power, it is much slower in conversion than other techniques. To overcome the drawbacks of existing method, a new analog to digital converter is designed by merging time interleaving technique with multiple identical successive approximation analog to digital converter (ADC). The existing conventional successive approximation analog to digital converter is simulated using TANNER EDA 13.0 in 180nm technology. In proposed method, time interleaving technique allows the use of multiple identical analog to digital converters to process regular sample data at a faster rate than the operating sample rate of each individual data converter. Time interleaving of analog to digital converters is a way to increase the overall system sample rate by using several ADCs in parallel. The challenge is to handle the mismatch between individual ADCs, especially at higher frequencies. The proposed architecture will be designed and its performance will be evaluated in TANNER EDA 13.0.

Keywords: Analog to digital converter (ADC), successive approximation register (SAR), time-interleaving (TI) and digital to analog comparator (DAC).

Volume: 5 | Issue: Special Issue

Pages: 1-8

Paper ID : IJCCTSSP1

Issue Date: Jan - Dec , 2017

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